Wafer Scale Variation of Planarization Length in Chemical Mechanical Polishing

Chemical mechanical polishing (CMP) is widely used for pla-narization of advanced interconnect and shallow trench isolation structures in integrated circuit manufacture. Of particular concern is within-die variation in the interlevel dielectric or oxide thickness remaining after polish, due to pattern density variations across the die. 1 Recent modeling of CMP has shown that a " planarization length " parameter, corresponding to the length scale over which raised topography (or pattern density) within a die affects local polishing rate, can be used to predict within-die polish performance. 2 As shown by Stine et al., the planarization length PL is the size of an averaging window used to calculate the " effective density " of raised features on the wafer that the CMP process and pad see during polishing. 3 The local oxide removal rate is then [1] where z is the oxide thickness and K is the blanket polish rate. The effective pattern density ␳ is a function of location x,y on the die, as calculated using the planarization length PL and chip layout information. Once PL has been determined for a given process, accurate simulation of the within-die thickness profile and nonuniformity resulting from CMP can be performed for a given layout. 4 This paper utilizes statistical and semiphysical modeling techniques to help understand how planarization length varies across process conditions, as well as within a given wafer. The next section discusses the experimental layout pattern and process conditions used, followed by description of the planarization length extraction procedure. The results of the experiment are then presented, in which the effect on planarization length is characterized as a function of down pressure, table speed, and die position within the wafer. We offer observations on the trade-offs between wafer scale removal rate uniformity, planarization length, and within-die total indicated range. Finally, we summarize our findings and suggest future work. Experimental A total of fifteen 200 mm wafers are prepared with a specialized CMP characterization test pattern, and then subjected to five combinations of table speed and down pressure CMP process conditions. The test wafers are fabricated with a blanket polyethylene tetraethyl-orthosilicate (PETEOS) film of 7500 Å, upon which ϳ1 ␮m aluminum is deposited. The metal film is patterned using the density mask from the MIT CMP characterization mask set. 3 This 12 mm dz dt K x y PL ϭ Ϫ ␳(, ,) mask has a 1 mm buffer region around …